Field of Invention
The present invention relates to a system for measuring the power supply noise, in and more particularly to a transient IR-drop waveform measurement system and method for a high speed integrated circuit. The present invention belongs to a field of micro electronic device technology.
Description of Related Arts
An integrated circuit (IC) is a kind of micro electronic device or component. After a series of semiconductor manufacturing processes, including oxidation, photolithography, proliferation, extension, and aluminum evaporation, the required components, such as the semiconductors, the resistors, and the capacitors, and the connecting wires among the components are integrated in a small piece of silicon wafer to constitute circuits having certain functions. Then the small piece of the silicon wafer is welded and packaged in a pipe shell of the electronic device. All the components in the structure have formed a unity so that the electronic components take a major step forward toward miniaturization, low-power, intelligence and high reliability.
With the silicon technology scaling, the gate length of the advanced complementary metal oxide semiconductor (CMOS) device is shorter than 40 nm, and the maximum frequency of operation has already reached GHz. As a result, the switching activity is getting more intense. Under the impact of the parasitic resistor and inductor, two severe noises, respectively IR-drop and
      L    ⁢          di      dt        ,are generated in the power supply network.
The Chinese patent application, CN 200910052451.9, filed Jun. 3, 2009, disclosed a fast supply network design method, and a schematic diagram of the power supply network is showed in FIG. 1.
For 40 nm and below technologies, it is common to observe a power supply noise with a peak that equals 10%-20% of the power supply voltage. With the decrease of the power supply voltage level by 10%-20%, the maximum operating frequency of voltage sensitive digital blocks reduces by nearly the same proportion, which reduces the operating speed of the gate circuit unit and affects the operation and performance of sensitive circuits. Especially in some chips, in order to achieve a faster operating speed, the chips adopt the P-channel metal oxide semiconductor (PMOS) and the N-channel metal oxide semiconductor (NMOS) with the lower threshold. For example, in some chips, the threshold voltage is as low as 10% to 15% of the reference voltage, which greatly increases the probability of error. The excessive IR-drop can even cause functional failures such as timing failure, abnormal reset and static random access memory (SRAM) flipping.
Therefore, the transient waveform of the IR-drop needs to be accurately monitored in field in order to prevent the function failure of the IC. However, due to the unknown process variations, a gap always exists between the simulated and actual waveform. In other words, it is difficult to accurately simulate the in-field IR-drop waveform by electronic design automation (EDA) tools during the design stage. As a result, silicon monitoring is of great need. The traditional methods for measuring the IR-drop include the off-chip measurement method and the on-chip measurement method. The off-chip method refers to measuring the IR-drop by high-end equipment such as the oscilloscope and the automatic test equipment (ATE), which does not need to modify the layout of the chip. However, the limitations of the off-chip equipment are relatively large, mainly including following problems.
(a) The off-chip equipment cannot monitor in-field.
(b) Due to the observation depth limitation, the off-chip equipment is impossible to extract the IR-drop from a location deep in the circuit and far from the VDD pins.
(c) Under the operating frequency of Giga Hertz, the off-chip measurement accuracy is easily affected by the parasitic parameters of the probe and the transmission cable.
With the decrease of the unit area silicon cost, in-field monitoring and adaptation are realized with the help of on-chip sensors. The on-chip sensors have the advantages of low parasitic parameters, high resolution, and in-field monitoring combined with other adaptation systems.
In the previous work, R. Petersen et al. proposed Voltage transient detection and induction for debug and test, illustrating that IR-drop monitoring is usually performed by the analog-to-digital converter (ADC). By connecting the power supply grid with the noise to the frontend of the ADC, the voltage level of the power supply noise is sampled and converted into a series of digital signatures. Later the transient waveform is recovered from the signatures by the digital-to-analog converter (DAC). Although the above mentioned method has a good effect, the area overhead and analog-digital integration effort are usually very high. Moreover, when the system frequency reaches GHz, the extra high ADC sampling frequency may cause significant design effort and power consumption. In 2014 IEEE Computer Society Annual Symposium, Y. Wang et al. proposed A compact cmos ring oscillator with temperature and supply compensation for sensor application, which loops back the inverted paths for measuring the IR drop by all digital components such as the ring oscillators (ROs). However, as the RO frequency only reflects the average IR-drop level from several to thousands of clock cycles, the IR-drop peak or duration information is lost. To better describe the IR-drop waveform, M. Fukazawa and M. Nagata published Measurements of digital signal delay variation due to dynamic power supply noise, and the delay-to-digital converters are adopted. However, as the signature is generated every clock cycle, the transient IR-drop peak/width within one clock cycle still cannot be fully rebuilt form the measurement results.
Although the above measurement methods apply the on-chip measurement system, but the measurement precision of the transient IR-drop waveform is low, the power consumption is large, and the measurement speed is slow.